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Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of a constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for operand in memory?

A

Immediate Addressing

B

Register Addressing

C

Register Indirect Scaled Addressing

D

Base Indexed Addressing

asked in Machine instructions and addressing modes by gate

1 Answer

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Register Indirect Scaled Addressing
answered by gate

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